In these recorded sessions , you would be learning the concepts of ASIC Physical Verification in Detail . Its significance and the Flows . This course would help you to understand Physical Verification in depth and not just fix DRCs and LVS issues .There is a lot more to Physical Verification , which goes in the background . Every setting done by the CAD / Enablement team impacts the way the execution of the rule from the Foundry . Making you understand the concepts and giving you the tips and tricks based on our experience to help you do your Job better .
Who can Benefit from this course ?
- B Tech Students , M Tech Students , PHD candidates
- For Job seekers , it would help in interview preparation
- Working Professionals who would want to enhance their skill in profiles like (Standard cell Layout Design, Analog Layout Design, Memory Layout Design & IO Layout Design)
- Things what you learn in this session, would help you improve the quality of work what you deliver
- Candidates who are hungry for Knowledge and would want to know the Whole ASIC implementation
The topics covered are as below :
- What is Physical Verification? Its Significance ?
- Tools used and Glossary
- DRC Flow
- Significance of DRC Rule checks
- Examples of DRCs and inputs to fix them
- LVS Flow
- Significance of LVS
- What happens in the background when you run LVS ?
- ERC Errors , significance of Power connections , Extraction Errors
- Types of LVS Errors and How to Debug them?
- IP Closure Guidelines
Price: Special Offer, highly discounted for initial students
Rs 10000 discounted to Rs 3999
Payment link for Indian Customers
$150 discounted to $59.95
Payment link for Overseas Customers